Coventry University Faculty of Engineering and Computing

Coventry University Faculty of Engineering and Computing
Coursework Task Sheet – be sure to keep a copy of all work submitted

Section A – To be completed by the student
Family Name(s)
Module No.
101CDE
Forename(s)

ID Number(s) (from your student card)
Submit via the module Moodle site by 23:55 on
29 June 2015
Time taken (hrs) (per student for group coursework)

Lecturer
KENNEDY IROANUSI Hand out date:
1 June 2013
Module Code and Title
101CDE Analogue and Digital Electronics No late work accepted. Extensions allowed only in extenuating circumstances. It is important that the work submitted is an individual effort. The penalties for plagiarism are severe. Full details on Faculty coursework policy and procedures are available at https://students.coventry.ac.uk/EC/Pages/Procedures.aspx

Assignment No. / Title
Resit Coursework
Estimated Time (hrs)
30   Assignment type:
Individual   % of Module Mark
50%
Section B – To be completed by the assessor
Marks breakdown (or on separate sheet)   Max   Awarded
Analogue Operational amplifier design (A and B)   25
Analogue Simulation to confirm results (C and D)   25
Digital Part A Function specification and design   25
Digital Part B Function realisation and simulation   25
Assessor’s signature
Total
100   Total
Internal moderators’ signature

This section may be used for feedback or other information

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Learning outcomes assessed
1.   Identify circuit models for basic electronic components.
2.   Apply circuit models to determine the response of simple electronic systems.
3.   Design small and medium scale digital circuits.
4.   Design elementary sequential circuits using a range of flip-flops.
5.   Simulate electronic circuits employing CAD software and construct practical realisations of prototypes.
Assessment criteria
The work will be assessed against an approved marking scheme. A perfectly correct technical solution presented to high professional standards with commentary and insights including detailed references and demonstrating additional research can expect to be awarded >80%. Marks will be lost for errors, missing sections, poor presentation and lack of detail in analysis and commentary.

IMPORTANT: For the resit coursework use the specification number shown in the grids rather than your own SID.
Your work should be submitted to the module Moodle site as a single pdf document by 23:55 on the day of the deadline. The file name should be your SID with the extension .pdf. The assignment is designed to be completed with the National Instruments Multisim simulator as installed in Faculty computer labs and issued to new first year students. You may use alternative software if you wish but we are not able to support it. You should prepare your document by using this task sheet as a template which is then converted to pdf. The University installation of Microsoft Word includes a pdf conversion utility for this purpose. Take care to ensure any image content is clear after conversion.

Analogue Task details
For this assignment you are required to design and test an operational amplifier circuit.
Part A Operational Amplifier Design [15 marks]
Your specification number is in the grid below.
A B C D E F G
5 3 1 2 5 6 7

The specification for your circuit is determined from the 7-digits (A through F) as follows:
The input – output relationship of the circuit is:
Vout = -(A.Vx)-(B.Vy)
Where:
A and B are the first two digits of your SID. If the digit is ‘0’ it should be interpreted as ‘10’ for the purpose of this specification.
C represents the input impedance seen by the Vx input in kΩ. If C is ‘0’ the input impedance should be interpreted as 10 kΩ.
D represents the input impedance seen by the Vy input in kΩ. If D is ‘0’ the input impedance should be interpreted as 10 kΩ.
Ensure you are clear on your specification before going further. If in doubt ask at a tutorial class.
Explain the rationale behind your selected operational amplifier circuit design here. You can assume that ideal operational amplifiers are available. In Multisim use the 3-terminal virtual opamp model. You should explain the circuit configuration and how the values of all resistors have been determined. Include references to any sources used in the CU Harvard style.
   Design explanation
Part B Operational Amplifier Schematic [10 marks]
Insert a copy of the final operational amplifier circuit schematic drawn on Multisim or a similar schematic editor here. The layout should be clear with all component values shown. Any devices associated with simulation should NOT be included in this diagram.
   Schematic diagram
Part C Arrangements for simulation [10 marks]
Determine a suitable approach for confirming the correct function of your design using simulation on Multisim. You should include a brief explanation to the approach and a Multisim circuit schematic to illustrate its implementation. Note there are many possible approaches that can be used to achieve this.
   Explanation of approach
   Schematic for simulation
Part D Simulation results [15 marks]
Present results from Multisim that show the operation of the design and explain why you consider the design is working correctly. To score well in this section you will need present a detailed and thorough investigation rather than just showing the results of one quick simulation. Be sure to explain results – you will not do well if you just copy in graphics from Multisim without explaining their significance. It is NOT necessary to physically construct the circuit for the resit.
   Simulation results

Digital Task Details
For this assignment you are required to design and test a combinational logic circuit.
Part A Combinational Logic Design [25 marks]
The specification is shown in the grid below:
A B C D E F G
7 7 5 5 2 2 1

You are required to design a combinational logic function with 4 inputs (P, Q, R, S) and a single output (Z). Whenever the minterm value of the inputs (PQRS) matches one of the digits in your SID the function output will be a don’t care. Otherwise, the function will output a logical ‘1’ whenever the minterm value of the inputs (PQRS) is a prime number. So that there is no confusion, for the purpose of this assignment, the numbers in the range of 4-bit minterm values that are considered prime are:
0, 1, 2, 3, 5, 7, 11, 13
Draw a truth-table to describe your function. [10 marks]
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Plot and group the function on a Karnaugh map. [10 marks]
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Deduce a minimal sum of products realisation for the function making maximum us of don’t care conditions. [5 marks]
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Part B Function realisation and simulation [25 marks]
Draw a circuit diagram for the implementation of your function using AND, OR, NOT gates alone. [5 marks]
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Draw a circuit diagram for the implementation of your function using only NAND gates. Include a justification using Boolean algebra for how the circuit was derived. [10 marks]
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Simulate both of the circuits on Multisim to demonstrate that they comply with the specification given above. You should include a schematic of your simulation arrangement and evidence of the results. Results should be annotated or explained to detail how they show compliance. The assessor will not do this for you. [10 marks]
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